OPTIONS {
	SCHEMATIC_GLOBAL = { VDD VSS }
	SCHEMATIC_GROUND = { VSS }
	SCHEMATIC_POWER = { VDD }
}
HEADER {
	EQUIVALENCE = ./TOPCELLNAME.run_details/lvsflow/equiv
}
COMPARE {
	ADV_SYMMETRY_RESOLUTION=TRUE
	CALCULATE_CLASS=FALSE
	COMPARE_PROPERTIES=TRUE
	DETECT_PERMUTABLE_PORTS=TRUE
	EQUATE_BY_NET_NAME=TRUE
	EXPLODE_ON_ERROR=TRUE
	FILTER=TRUE
	GATE_RECOGNITION=FALSE
	MATCHED_PORTS_CONTINUE=FALSE
	MERGE_PARALLEL=TRUE
	MERGE_PATHS=FALSE
	MERGE_SERIES=TRUE
	PROPERTY_WARNING=TRUE
	PUSH_DOWN_PINS=TRUE
	PUSH_DOWN_DEVICES=TRUE
	REMOVE_DANGLING_NETS=TRUE
	SHORT_EQUIVALENT_NODES=FALSE
	RETAIN_NEW_DATA=TRUE
	RETAIN_PREVIOUS_DATA=FALSE
	TEXT_RESOLVES_PORT_SWAP=FALSE
}
